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Top 47 Computer Architecture Interview Questions - Jul 25, 2022

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Top 47 Computer Architecture Interview Questions

Q1. Can You Explain What Are The Basic Components In A Microprocessor?

Deal with strains to refer to the cope with of a block

information lines for data trfer

IC chips 4 processing data

Q2. Explain Virtualization With The Pros And Cons?

In a way virtualization appears just like emulation however surely it stocks hardware resources from the host OS.

This method is slower compared to partition technique however is faster than emulation.

Virtualization had additionally big help considering it is able to additionally provide with 3d support.

With the help of virtualization it allow users to create digital clusters.

But virtualization structures require a variety of reminiscence in form of ram.

For virtualization it's miles mandatory that the virtualized platform has the same structure because the host laptop in any other case because of incompatibilities it isn't always viable.

Q3. Explain The Difference Between Interrupt Service Routine And Subroutine?

Subroutine are the part of executing approaches(like several system can call a subroutine for gain project),while the interrupt subroutine by no means be the part.Interrupt subroutine are subroutine which might be outside to a technique.

Q4. What Are The Different Types Of Interrupts In A Microprocessor System, Explain?

In the normal execution of a application there are three styles of interrupts that can purpose a destroy:

External Interrupts: These kinds of interrupts usually come from outside enter / output devices which can be connected externally to the processor. They are normally independent and oblivious of any programming that is presently jogging on the processor.

Internal Interrupts: They are also referred to as traps and their causes can be due to some unlawful operation or the misguided use of facts. Instead of being precipitated through an external event they're generally brought about due to any exception that has been resulting from the program itself. Some of the causes of these varieties of interrupts can be due to attempting a department by means of zero or an invalid opcode and so forth.

Software interrupts: These kinds if interrupts can arise best all through the execution of an training. They may be used by a programmer to purpose interrupts if need be. The number one reason of such interrupts is to interchange from consumer mode to manager mode.

Q5. What Is Internal Interrupts?

They also are known as traps and their causes will be due to some unlawful operation or the faulty use of facts. Instead of being precipitated through an outside occasion they are usually prompted because of any exception that has been because of this system itself. Some of the reasons of those styles of interrupts may be due to trying a division by way of 0 or an invalid opcode etc.

Q6. Described The Features Of Assembly Language?

Although Assembly degree languages are not clean to understand they may be notably simpler as compared to machine degree languages.

The programs written on this language are not transportable and the debugging method is also now not very clean.

The packages advanced in meeting language are thoroughly machine based.

Q7. What Is Vertical Microcode?

Vertical microcode can be considered to be a segment of code or operators which have been clubbed collectively into fields. In this discipline every micro operation is given a completely unique cost.

Q8. How Do We Handle Precise Exceptions Or Interrupts?

Like java have a function for handling exception dealing with "prime seize".The exception like divide with the aid of zero,out of bound.

Q9. Explain Partitioning In Reference To Operating Systems?

Partitioning entails the consumer to partition their difficult drives and then they could enforce / install a couple of operating structures on them. The consumer calls for a boot supervisor to replace among specific working structures.

Q10. List The Components Of The Ven Neumann Architecture?

The most important components of the Von Neumann structure have been as follows:

It consisted of a prime memory which would be used to keep all of the statistics and instructions.

It might consist of an mathematics logical unit also referred to as the ALU. This element turned into with the intention to work with binary facts.

It additionally constituted of a manipulate unit which would be accountable for the translation of commands and their execution.

The control unit could also be controlled with the aid of the manipulate unit itself.

Q11. What Do You Understand Vertical Micro Code, Explain The Designing Strategy Of A Control Unit Coded On Vertical Code?

Vertical microcode may be considered to be a phase of code or operators that have been clubbed together into fields. In this discipline each micro operation is given a unique value.

This facilitates in efficient employer of related code collectively.

An effective layout approach may be in case of two micro operations taking place at the identical country, to assign them  exceptional fields.

A no operation NOP can be protected in each discipline if essential.

The closing micro operations can be dispensed most of the other operation field bits.

Also micro operations that regulate the same registers can be grouped collectively within the equal discipline.

Q12. Explain Write Through Method?

Considered to be the most effective this method involves the updating of the primary memory similar to each write operation. With this the cache reminiscence is likewise up to date in parallel in case it also carries the phrase designated at the address. The number one benefit of this method is statistics integrity, the primary and the cache reminiscence each incorporate the equal facts.

Q13. Briefly Explain The Two Hardware Methods To Establish Priority?

Two different approaches of setting up hardware precedence are Daisy Chaining and parallel precedence.

Daisy chaining is a form of a hardware implementation of the polling procedure.

Parallel priority is faster of the two and makes use of a priority encoder to establish priorities.

In parallel priority interrupt a register is used for which the bits are separated by the interrupt indicators from each device.

The parallel precedence interrupt may additionally comprise a mask register that is on the whole used to control the status of each request regarding interrupts.

Q14. Explain Vertical Micro Code?

In case of vertical micro code each action is encoded in density.

Vertical micro code are slower however they take less space and their actions at execution time want to be decoded to a signal.

Q15. What Is Software Interrupts?

These kinds if interrupts can occur most effective throughout the execution of an preparation. They may be used by a programmer to reason interrupts if need be. The primary purpose of such interrupts is to replace from consumer mode to manager mode.

Q16. Explain The Requirement Of Page-table And The Different Ways In Which The Table Can Be Organized?

For any pc commonly the memory area is lesser in comparison to the deal with area this means that the principle memory is lesser compared to the secondary memory.

On the basis of the demands of the CPU data is trferred among the 2 recollections.

Due to this a mapping approach is needed which may be carried out using web page-table.

The page desk can be organized in  approaches namely inside the R/W reminiscence and by way of using associative good judgment.

In case of R/W reminiscence the rate of execution of programs is gradual as it requires  most important reminiscence references to examine facts. It is also known as reminiscence page desk.

In case of associative common sense it's miles considered to be extra effective because it may be built with certainly preserving thoughts to have identical no. Of blocks in the memory as many as there are phrases.

Q17. Explain The Components Of The Ven Neumann Architecture?

The foremost components of the Von Neumann architecture had been as follows:

It consisted of a major reminiscence which could be used to store all the facts and instructions.

It would consist of an arithmetic logical unit additionally known as the ALU. This element become so as to work with binary records.

It additionally created from a manipulate unit which might be accountable for the interpretation of commands and their execution.

The manipulate unit might also be controlled by the manipulate unit itself.

Q18. Tell Me How Does Cloud Architecture Overcome The Difficulties Faced By Traditional Architecture?

Cloud architecture offer large pool of dynamic resources that can be accessed any time whenever there is a requirement, which isn't always being given by the traditional architecture. In traditional architecture it isn't always viable to dynamically partner a device with the growing demand of infrastructure and the services. Cloud structure provides scalable houses to satisfy the excessive demand of infrastructure and provide on-call for get right of entry to to the user.

Q19. Explain Direct Mapping?

In direct mapping the RAM is made use of to store information and a few is stored within the cache. An cope with space is cut up into  components index area and tag subject. The cache is used to store the tag discipline while the rest is stored within the essential reminiscence. Direct mapping`s performance is immediately proportional to the Hit ratio.

Q20. What Do You Understand By Virtualization?Point out The Pros And Cons?

In a way virtualization seems just like emulation however actually it stocks hardware resources from the host OS.

This technique is slower in comparison to partition method however is quicker than emulation.

Virtualization had additionally full-size guide thinking about it is able to also offer with 3d assist.

With the assist of virtualization it enable customers to create virtual clusters.

But virtualization systems require a whole lot of reminiscence in form of ram.

For virtualization it's miles obligatory that the virtualized platform has the equal architecture because the host laptop otherwise due to incompatibilities it is not feasible.

Q21. What Are The Requirement Of Page-desk?

For any pc usually the reminiscence space is lesser in comparison to the deal with area this means that the principle reminiscence is lesser as compared to the secondary memory.

Q22. Explain Briefly Six Different Types Of Addressing Modes Of An Instruction?

The special varieties of commands are as follows:

Immediate Mode: As the call shows the training in itself consists of the operand.

Register Mode: In this mode the operands of an education are placed within the registers which themselves are positioned within the CPU.

Direct cope with mode: The address part of an education on this mode is the effective deal with.

Indexed addressing mode: In this mode that allows you to attain the effective deal with the contents of the index sign in is brought to the commands cope with part.

Relative deal with mode: In this mode with a purpose to find out the powerful address the contents of the program counter are brought to the deal with a part of the practise.

Q23. Explain The Cpu Is Busy But You Want To Stop And Do Some Other Task. How Do You Do It?

Arise a non maskable interrupt.

Then provide leap coaching to required subroutine.

Q24. Can You Explain The Two Hardware Methods To Establish Priority?

Two distinctive ways of organising hardware precedence are Daisy Chaining and parallel priority.

Daisy chaining is a form of a hardware implementation of the polling system.

Parallel precedence is faster of the 2 and uses a concern encoder to set up priorities.

In parallel priority interrupt a register is used for which the bits are separated by the interrupt alerts from every device.

The parallel precedence interrupt may incorporate a masks register that's on the whole used to govern the reputation of every request concerning interrupts.

Q25. Described Some Of The Common Rules Of Assembly Language?

Some of the commonplace policies of assembly level language are as follows:

In meeting language the label discipline may be both empty or may also specify a symbolic address.

Instruction fields can specify pseudo or gadget commands.

Comment fields may be left empty or may be commented with.

Up to 4 characters are best allowed within the case of symbolic addresses.

The symbolic addresses field are terminated by a comma while the remark area starts with a ahead decrease.

Q26. Explain Mesi?

The MESI protocol is also known as Illinois protocol due to its improvement at the University of Illinois at Urbana-Champaign and MESI is a broadly used cache coherency and reminiscence coherence protocol.

MESI is the most commonplace protocol which helps write-again cache. Its use in personal computers have become sizeable with the introduction of Intel's Pentium processor to "support the extra efficient write-returned cache similarly to the write-through cache formerly utilized by the Intel 486 processor"

Q27. Point Out The Characteristics Of The Risc Architecture?

RISC which means decreased preparation set as the acronym say objectives to lessen the execution instances of commands via simplifying the instructions.

The principal traits of RISC are as follows:

Compared to normal instructions they have a lower wide variety of commands.

The addressing modes in case of RISC is also decrease.

All the operations that are required to be finished take area within the CPU.

All education are executed in a unmarried cycle as a result have a faster execution time.

On this architecture the processors have a large variety of registers and a far more green education pipeline.

Also the practise codecs are of constant period and can be easily decoded.

Q28. Explain What Are Five Stages In A Dlx Pipeline?

The instruction units may be differentiated by:

Operand garage inside the CPU

Number of explicit operands in step with practise

Operand region

Operations

Type and length of operands

Q29. Explain What Are The Different Hazards? How Do We Avoid Them?

There are situations, referred to as risks, that prevent the next preparation inside the instruction circulate from executing for the duration of its targeted clock cycle. Hazards lessen the performance from the best speedup received with the aid of pipelining.

There are three training of Hazards:

Structural Hazards: It get up from aid conflicts when the hardware can't help all feasible combinations of commands simultaniously in ovelapped execution.

Data Hazards: It arise while an training depends at the effects of previous instruction in a way this is uncovered by the ovelapping of commands in the pipeline.

Control Hazards: It stand up from the pipelining of branches and other instructions that exchange the PC.

Q30. Explain How Many Types Of Memory In Computer Architecture?

Laptop have distinctive kind of memory like primary reminiscence , Auxiliary reminiscence , buffer reminiscence , Cache reminiscence , virtual reminiscence ,the work of all memory heterogeneously number one memory is without delay communicate with the CPU . Auxiliary reminiscence are used for storing the facts for long time . Buffer memory are mainly used for storing the intermediate records between the travel . Cache reminiscence are used for storing the the ones statistics that currently required at process time for growth the speed of the information . Virtual memory are put in between the 2 reminiscence for growth the speed of data or guidance it me it put among HDD and RAM .

Q31. What Is Virtual Memory In Computer?

Virtual memory is that when the to be had RAM memory is not enough for the device to run the contemporary programs it will take some reminiscence from difficult disk.This reminiscence is named as Virtual reminiscence.

Q32. List The Different Types Of Micro-operations?

The micro-operations in computers are classified into the following classes:

Register trfer micro-operations: These kind of micro operations are used to trfer from one check in to every other binary facts.

Arithmetic micro-operations: These micro-operations are used to carry out on numeric records stored within the registers some arithmetic operations.

Logic micro-operations: These micro operations are used to perform bit style operations / manipulations on non numeric data.

Shift micro operations: As their call suggests they are used to carry out shift operations in statistics keep in registers.

Q33. Described The Different Types Of Fields That Are Part Of An Instruction?

An practise can be taken into consideration to be a command that has been issued to a laptop to carry out a particular operation. The coaching layout consists of diverse field in them together with:

Operation Code Field: Also known as the op code discipline, this area is used to specify the operation to be achieved for the training.

Address Field: This subject as its name specifies is used to designate the various addresses including sign in cope with and reminiscence deal with.

Mode subject: This area specifies as to how effective deal with is derives or how an operand is to perform.

For ex: ADD R0, R@In this example the ADD is the operand while the R1, R0 are the cope with fields.

Q34. Explain Briefly About Flip-flops?

Flip flops are also known as bi-stable multi-vibrators. They are capable of shop one little bit of records.

Flip flops are capable of be in  solid states specifically one and 0. They can be in either states and so that it will change their states they ought to be driven by way of a cause.

Certain flip flops are edge triggered which means they simplest reply to voltage modifications from one level to every other. They can be either advantageous edged triggering or negative edged triggering.

Flip flops turn on in a random way this is they may be in either of the states whilst they're grew to become on. In order to have a uniform country when they may be powered on a CLEAR sign must be despatched to the turn flops. They can also be made to turn on in a selected country by means of applying PRESET.

Q35. What Are The Steps Involved In An Instruction Cycle?

Any program living within the reminiscence consists of a set of training that want to be finished via the laptop in a sequential manner. This cycle for every coaching is called the guidance cycle . The cycle includes the following steps:

Fetch training: Like the call stated on this technique the cpu fetches the training from the memory. The PC get loaded with the cope with of the practise.

Decode: the education: In this system the coaching gets decoded by means of the processor.In case the preparation has an oblique cope with the powerful deal with is examine from the memory.Fetch the operand from the reminiscence

Execution: once the education gets decoded the processor executes the instruction.

Result: Store the result in the precise region.

Q36. State Some Of The Common Rules Of Assembly Language?

Some of the not unusual policies of assembly degree language are as follows:

In meeting language the label field may be both empty or might also specify a symbolic cope with.

Instruction fields can specify pseudo or gadget instructions.

Comment fields may be left empty or can be commented with.

Up to 4 characters are most effective allowed inside the case of symbolic addresses.

The symbolic addresses field are terminated by means of a comma while the remark discipline starts with a forward lower.

Q37. What Is Associative Mapping?

In this form of mapping the associative memory is used to keep content material and addresses both of the memory phrase. This permits the placement of the any phrase at any place inside the cache reminiscence. It is considered to be the fastest and the maximum flexible mapping shape.

Q38. Mention The Pros And Cons Of Emulation?

Emulation is the system wherein a target CPU and its corresponding hardware would be emulated exactly the identical way.

Emulation is a fantastically antique concept and isn't always extensively used to emulate complete scale OS usage.

It is taken into consideration to be the satisfactory platform for embedded/os improvement.

Emulation is feasible for any hardware and it does no longer affect the underlying OS ( host ).

Although there are many positives of emulation there are few drawback of it as well, Emulation may be extremely sluggish.

Complete thorough hardware aid cannot be feasible in emulation.

Emulation is also very resource hungry and calls for a number of ram to function easily.

Q39. Explain A Snooping Cache?

Snooping is the system where the man or woman caches screen address lines for accesses to memory places that they've cached. When a write operation is located to a area that a cache has a copy of, the cache controller invalidates its personal copy of the snooped memory place.

Snarfing is wherein a cache controller watches both address and facts in an try and replace its own copy of a memory location while a second grasp modifies a vicinity in principal memory

Q40. What Are The Major Difficulties Of Pipeline Conflicts In Processors Supporting Pipe Lining?

The following are the principle reasons for pipe line conflicts in the processor:

When the same resource is accessed at the identical time by using  exclusive segments it outcomes in resource conflicts. The only way to resolve this trouble is to use separate records memories.

In case an training's execution depends on the end result of a previous guidance and that end result is unavailable it ends in records dependency conflicts.

Instructions that alternate the matter of the PC can motive a variety of problems. This is general in particular in the case of Branch instructions. A approach to resolve this problem is called behind schedule load where sure preparation are made to execute in a delayed way to keep away from conflicts.

Q41. What Are The Different Types Of Fields That Are Part Of An Instruction?Give an explanation for?

An instruction may be considered to be a command that has been issued to a computer to perform a selected operation.

The preparation format includes various area in them consisting of:

Operation Code Field: Also referred to as the op code field, this discipline is used to specify the operation to be performed for the preparation.

Address Field: This field as its call specifies is used to designate the numerous addresses which includes register deal with and memory address.

Mode field: This area specifies as to how effective address is derives or how an operand is to perform.

For ex:. ADD R0, R@In this example the ADD is the operand while the R1, R0 are the deal with fields.

Q42. What Do You Understand By Partitioning In Reference To Operating Systems? Give Their Advantages And Disadvantages?

Partitioning involves the consumer to partition their hard drives after which they are able to implement / deploy a couple of operating structures on them. The user requires a boot supervisor to replace among one-of-a-kind operating structures.

Partitioning lets in each operating gadget to work optimally.

Each os has the complete access to the hardware of the gadget on which it is being executed.

Also relying at the record device used the consumer is free to resize his partition according to his desires.

But guide partition isn't always a easy assignment and requires endurance.

The machine needs to be restarted in case the consumer wants to switch operating systems.

Q43. Explain Write Back Method?

In this approach simplest the vicinity within the cache is up to date. Whenever such an replace takes place a flag is ready which makes positive that during case the phrase is removed from the cache the suitable reproduction is stored to the primary reminiscence. This approach is generally taken when a word is continuously updated at common periods.

Q44. Explain About Designing Strategy Of A Control Unit Coded On Vertical Code?

A no operation NOP can be included in each field if essential.

The ultimate micro operations may be disbursed many of the other operation subject bits.

Also micro operations that alter the equal registers may be grouped collectively in the same area.

Q45. Explain About The Major Difficulties Of Pipeline Conflicts In Processors Supporting Pipe Lining?

The following are the main motives for pipe line conflicts inside the processor:

When the identical useful resource is accessed at the same time by  exclusive segments it outcomes in aid conflicts. The only manner to solve this trouble is to apply separate facts memories.

In case an practise's execution relies upon on the end result of a previous training and that result is unavailable it leads to statistics dependency conflicts.

Instructions that change the matter of the PC can motive quite a few issues. This is well-known mainly within the case of Branch commands. A technique to solve this issue is referred to as delayed load where sure practise are made to execute in a behind schedule manner to avoid conflicts.

Q46. Instead Of Just five-8 Pipe Stages Why Not Have, Say, A Pipeline With 50 Pipe Stages?

The latency of the structure increases with the pipeline stages. Penalty because of the flushing of the pipeline for instance will even growth Cycles Per Instruction of the CPU structure

Q47. What Is External Interrupts?

These forms of interrupts typically come from outside enter / output gadgets which might be related externally to the processor. They are commonly independent and oblivious of any programming this is presently walking on the processor.




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